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Cold compiled FP32 force training can cache a grid-pair launch that exceeds per-block shared memory. wrap_triton records a call during fake-tensor tracing without loading the kernel, so the eager launch loop mistakes a successful trace for a resource-validated configuration. The actual OutOfResources exception arrives later in Inductor's backward compilation, outside the retry loop. Reducing the training batch cannot fix the tile's fixed resource footprint. For preset Pro on RTX PRO 6000 Blackwell, the second-order kernel initially requests 118784 bytes against a 101376-byte device limit. Eager execution finds a smaller grid tile requiring 79872 bytes, but cold graph capture cannot take that retry. Prewarming eagerly can consequently hide the bug. Resolve launch feasibility before recording or executing a kernel: - Separate candidate selection from the runtime launch and use the same specialization parameters for validation and execution. - Compile candidates with Triton warmup using operand dtypes instead of tensor allocations, then load the compiled handles to enforce the target device's resource limits without executing the kernel. - Represent runtime pair counts and physical strides by non-unit scalar placeholders during validation. Keep their actual values in the launch ABI so dynamic batches and degree-major views retain one compiled graph. - Cache validated choices by kernel, device, static geometry, complete operand signature and differentiation-order accumulator count. Cache an unsuccessful search as well, avoiding repeated compilation for layouts served by the reference composition. - Retain exact-device tuned configurations as preferred candidates, while subjecting them to the same validation and deduplicating fallback choices. Forward, first backward and force-loss second backward share the selector. - Preserve compiler-visible Triton operators and the reference einsum path when no candidate fits. Only resource-limit errors reject a candidate; other compilation failures remain visible. Add cold compiled force-loss regressions for the two production Pro grid layouts in FP32 and BF16 autocast. Exercise batch-dependent physical strides with changing node counts, compare outputs and second-order gradients with eager execution, and verify that only one graph is compiled. Clear launch selection state and disable the FX graph cache so prior eager tests cannot mask an invalid first choice. Cover reference fallback through compilation when no fused launch is available. Validation on RTX PRO 6000 Blackwell Server Edition with PyTorch 2.13.0+cu130 and Triton 3.7.1: - All 20 grid-pair tests pass, including existing FP32/BF16 forward and first/second-gradient checks against the float64 reference, dynamic layout tests, and the five cold-compile/fallback regressions. - A cold FP32 second-order reproducer with one graph node passes without an eager warmup. The validated and final compiled backward kernels agree on their resource footprint; the Pro second-order tile uses 79872 bytes. - A preset Pro fine-tuning smoke run completes distributed precompilation and two optimizer steps with one DDP rank, ZeRO Stage 1, a 300-atom batch budget, AMP/TF32 disabled, and both CUDA/Triton training gates enabled. All 278 floating-point model tensors in the saved checkpoint are finite. - An independent review compares 120 actual layout signatures across five geometries, two dtypes, three differentiation orders and four storage layouts. Their shared-memory usage matches the validation signatures. - Ruff and whitespace checks pass. Other GPU architectures and the project-pinned PyTorch 2.10 environment were not exercised.
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Source LGTM at 1351a4f. Reviewed both changed files and the forward/first-backward/second-backward integration, including the no-viable-config reference paths. Resource selection now occurs before recording wrap_triton; tuned choices receive the same validation, only OutOfResources triggers retries, and successful/unsuccessful choices are cached without putting node counts or physical strides into the selector key. Shared launch kwargs keep the static geometry and launch settings consistent. The five added cold-compile cases cover both layouts, FP32/BF16, changing node counts, force-loss differentiation and a forced reference path.
Bounded independent checks: exact-source helper extraction with test doubles passed preferred-tile rejection at handle loading, positive/negative caching, shared validation kwargs, propagation of unrelated compiler errors, and slot splitting. Also inspected Triton 3.6.0 upstream warmup and _init_handles implementations for the dtype-only compilation/resource-check interfaces. These checks are not GPU execution or an end-to-end pinned-environment qualification.
Reusing the PR's reported fresh-process 20-test Blackwell / PyTorch 2.13 / Triton 3.7.1 results rather than requesting another full GPU run. My executor has no PyTorch installed; I did not independently reproduce GPU numerics, pinned PyTorch 2.10 behavior, other architectures or throughput. Those remain explicitly unverified, not newly observed failures. Current CUDA CI is successful; Python and C++ test workflows are still running. No actionable source defect found in this scope.
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Qualification clarification for my review above: the Pass testing on CUDA aggregate is successful, but the actual Test Python on CUDA and Test C++ on CUDA jobs were skipped. Thus this CI result is not an independently executed GPU test. GPU evidence remains the author's reported Blackwell results, with the independent-validation limitations already stated. The source LGTM is unchanged.
Codecov Report❌ Patch coverage is
Additional details and impacted files@@ Coverage Diff @@
## master #6095 +/- ##
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- Coverage 78.08% 76.76% -1.32%
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Files 1171 1171
Lines 141661 141709 +48
Branches 5079 5080 +1
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- Hits 110620 108788 -1832
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Code review
Found 3 issues (blocking):
-
The forced-fallback test monkeypatches away the entire
_select_launch_config, leaving the realOutOfResourcesrejection loop, the loop-exhaustionreturn None, and failure caching with no deterministic coverage (repo AGENTS.md requires UTs to cover all code paths) — inline attest_grid_pair_train.py:430. -
The five cold-compile tests are not guaranteed reproducers of the original bug: vacuous pre-fix failure via
AttributeError, the(2,64)cases are masked by earlier eager warmup in full-suite runs, and the true p_dim=147 repro shape is not committed — inline attest_grid_pair_train.py:422. -
The cold-compile tests never assert that a fused candidate was admitted, so an always-fallback regression passes silently — inline at
test_grid_pair_train.py:503.
Regression verdict: unverified — no committed test provably fails on pre-fix code for the right reason; exposure is hardware- and test-order-dependent.
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Actionable comments posted: 2
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Inline comments:
Review comments at @source/tests/pt_expt/kernels/test_grid_pair_train.py:
- Line 635: Update the `fallback_ops` assertion in the grid-pair training test
to account for whether the CUDA device has a viable fused configuration. Require
an empty set only when one exists; when none exists, accept and verify the
`_eager_packed` reference fallback and its outputs and gradients.
- Line 635: Move the fallback_ops assertion to immediately after
force_loss_gradient(actual, inputs) in the compiled-result flow, before the
eager expected-value calls; make_fx(force_forward, ...) does not exercise the
bwd2 fallback.
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Incremental review of 1351a4f → e85e510: the new selector tests now exercise the real cached selector and launch rejection rather than replacing the selector. I independently executed its exact AST and the 4 new test cases with minimal CPU/device/Triton doubles: warmup and handle-load retry, cached all-candidate rejection, and uncached unrelated compiler failure all pass. This is a focused control-flow check, not native Torch/Triton or CUDA execution. The author's Blackwell parent-failure/current-pass report was inspected but not independently rerun.
I am not marking the whole delta LGTM yet. The existing review at #6095 (comment) remains relevant: fallback_ops is asserted only after eager reference evaluation, so the forced-case bwd2 observation is not isolated to compiled execution; and an unconditional zero-fallback requirement needs a device viability precondition. I verified those points against the updated test and launcher and am referencing the existing thread instead of adding duplicate inline findings. Current-head CI remains in progress.
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Incremental review e85e510 → 68c57e0: this test-only delta addresses both issues referenced in my preceding review. It checks candidate probes/admission and fallback observations immediately after compiled force-loss backward, before eager expected evaluation; genuine no-viable-tile devices can use the reference path, whereas unconditional/cached rejection without candidate validation fails. Closure defaults correctly bind each operation and original warmup. Delta LGTM.
Independent validation here: source/AST ordering inspection plus 64 admission/fallback set-membership controls, not a native Torch/Triton/GPU run. I inspected the author's five-case Blackwell pass and exact-parent resource-failure report as supplementary evidence without duplicating GPU work.
The current Test Python (6, 3.10) job https://github.com/deepmodeling/deepmd-kit/actions/runs/39926499524/job/120324965744 failed fetching torch wheel metadata with TLS DecryptError during dependency installation, before tests. That is an infrastructure failure, not evidence of numerical failure; other jobs are still running. No blanket green-CI claim.
Summary
Validate Triton grid-pair launch resources before graph capture so cold compiled force training can select a feasible tile or retain the reference composition.
Previously,
wrap_tritoncould record a call during fake-tensor tracing without loading its kernel. The launch retry loop treated successful tracing as successful resource validation and cached an invalid tile. The actual shared-memory error then arrived during Inductor backward compilation, outside the retry loop. An eager warmup could hide this failure.Implementation
warmupinputs and load their handles to check device resource limits without allocating inputs or executing kernels.Review follow-up validation
_launchwith its exact pre-PR parent implementation makes the multifocus FP32 case fail during second-backward compilation withOutOfResources: 145408 bytes required versus a 101376-byte shared-memory limit. Repository source was not changed for that comparison; this is not an AttributeError-based failure.Original PR validation
Based on master
d07c097b; this PR contains one cherry-picked commit with an identical patch to the source change. It does not depend on the ASE or native-spin PRs.Validation uses an NVIDIA RTX PRO 6000 Blackwell Server Edition with PyTorch 2.13.0+cu130 and Triton 3.7.1:
_launchimplementation, with repository files unchanged, fails the cold FP32 force-backward regression: shared memory required is 118784 bytes, exceeding the 101376-byte device limit.source/tests/pt_expt/kernels/test_grid_pair_train.pypass in a fresh process on the unmodified branch, using separate compiler caches from the parent-launcher reproduction.Other GPU architectures and the project-pinned PyTorch 2.10 environment were not exercised. The original commit's full-training and layout-sweep results are historical and were not repeated for this PR. No throughput improvement is claimed.
Summary by CodeRabbit
Performance
Reliability
Compatibility